This topic lists the options that provide new functionality in this release.
Some compiler options are only available on certain systems, as indicated by these labels:
Label |
Meaning |
---|---|
i32 |
The option is available on systems using IA-32 architecture. |
i64em |
The option is available on systems using Intel® 64 architecture. |
i64 |
The option is available on systems using IA-64 architecture. |
If no label appears, the option is available on all supported systems.
If "only" appears in the label, the option is only available on the identified system.
For more details on the options, refer to the Alphabetical Compiler Options section.
For information on conventions used in this table, see Conventions.
New compiler options are listed in tables below:
The first table lists new options that are available on Windows* systems.
The second table lists new options that are available on Linux* and Mac OS* X systems. If an option is only available on one of these operating systems, it is labeled.
Windows* OS Options |
Description |
Default |
---|---|---|
/arch:IA32
|
Generates code that will run on any Pentium or later processor. |
OFF |
/arch:SSE3 (i32, i64em) |
Optimizes for Intel® Streaming SIMD Extensions 3 (Intel® SSE3). |
OFF |
/arch:SSSE3 (i32, i64em) |
Optimizes for Intel® Supplemental Streaming SIMD Extensions 3 (Intel® SSSE3). |
OFF |
/arch:SSE4.1 (i32, i64em) |
Optimizes for Intel® Streaming SIMD Extensions 4 Vectorizing Compiler and Media Accelerators. |
OFF |
/assume:[no]ieee_fpe_flags |
Determines whether the floating-point exception and status flags are saved on routine entry and restored on routine exit. |
OFF |
/assume:[no]old_logical_ldio |
Determines whether NAMELIST and list-directed input accept logical values for numeric IO-list items. |
ON |
/assume:[no]old_maxminloc |
Determines the results of the intrinsics MAXLOC and MINLOC when given an empty array as an argument. |
ON |
/debug:[no]parallel(i32, i64em) |
Generates parallel debug code instrumentations needed for the thread data sharing and reentrant call detection of the Intel® Parallel Debugger Extension. |
OFF |
/fpe-all:n |
Allows some control over floating-point exception handling for each routine in a program at run-time. |
/fpe-all:3 |
/GS |
Determines whether the compiler generates code that detects some buffer overruns. |
/GS- |
/homeparams |
Tells the compiler to store parameters passed in registers to the stack. |
OFF |
/hotpatch |
Tells the compiler to prepare a routine for hotpatching |
OFF |
/QaxSSE2 |
Can generate Intel® SSE2 and SSE instructions for Intel processors, and it can optimize for Intel® Pentium® 4 processors, Intel® Pentium® M processors, and Intel® Xeon® processors with Intel® SSE2. |
OFF |
/QaxSSE3 |
Can generate Intel® SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for processors based on Intel® Core™ microarchitecture and Intel NetBurst® microarchitecture. |
OFF |
/QaxSSSE3 |
Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for the Intel® Core™2 Duo processor family. |
OFF |
/QaxSSE4.1 |
Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. |
OFF |
/QaxSSE4.2 |
Can generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for the Intel® Core™ processor family. |
OFF |
/Qdiag-enable:sc-parallel |
Enables analysis of parallelization in source code (parallel lint diagnostics). |
OFF |
/Qdiag-error-limit:n |
Specifies the maximum number of errors allowed before compilation stops. |
n=30 |
/Qdiag-once:id[,id,...] |
Tells the compiler to issue one or more diagnostic messages only once. |
OFF |
/Qdiag-error-limit:n |
Specifies the maximum number of errors allowed before compilation stops. |
n=30 |
/Qdiag-once:id[,id,...] |
Tells the compiler to issue one or more diagnostic messages only once. |
OFF |
/Qfast-transcendentals |
Enables the compiler to replace calls to transcendental functions with faster but less precise implementations. |
OFF |
/Qfma |
Enables the combining of floating-point multiplies and add/subtract operations. |
ON |
/Qfp-relaxed |
Enables use of faster but slightly less accurate code sequences for math functions. |
OFF |
/Qinstruction:[no]movbe |
Determines whether MOVBE instructions are generated for Intel processors. |
OFF |
/Qimsl |
Tells the compiler to link to the IMSL* library. |
OFF |
/Qmkl |
Tells the compiler to link to certain parts of the Intel® Math Kernel Library. |
OFF |
/Qopenmp-link:library |
Controls whether the compiler links to static or dynamic OpenMP run-time libraries. |
/Qopenmp-link:dynamic |
/Qopenmp-threadprivate:type |
Lets you specify an OpenMP* threadprivate implementation. |
/Qopenmp-threadprivate:legacy |
/Qopt-block-factor:n |
Lets you specify a loop blocking factor. |
OFF |
/Qopt-jump-tables:keyword |
Enables or disables generation of jump tables for switch statements. |
/Qopt-jump-tables:default |
/Qopt-loadpair |
Enables loadpair optimization. |
/Qopt-loadpair- |
/Qopt-mod-versioning |
Enables versioning of modulo operations for certain types of operands. |
/Qopt-mod-versioning- |
/Qopt-prefetch-initial-values |
Enables or disables prefetches that are issued before a loop is entered. |
/Qopt-prefetch-initial-values |
/Qopt-prefetch-issue-excl-hint |
Determines whether the compiler issues prefetches for stores with exclusive hint. |
/Qopt-prefetch-issue-excl-hint- |
/Qopt-prefetch-next-iteration |
Enables or disables prefetches for a memory access in the next iteration of a loop. |
/Qopt-prefetch-next-iteration |
/Qopt-subscript-in-range
|
Determines whether the compiler assumes no overflows in the intermediate computation of subscript expressions in loops. |
/Qopt-subscript-in-range- |
/Qpar-affinity:[modifier,...]type[,permute][,offset] |
Specifies thread affinity. |
OFF |
/Qpar-num-threads:n |
Specifies the number of threads to use in a parallel region. |
OFF |
/Qprof-data-order |
Enables or disables data ordering if profiling information is enabled. |
/Qprof-data-order |
/Qprof-func-order |
Enables or disables function ordering if profiling information is enabled. |
/Qprof-func-order |
/Qprof-hotness-threshold |
Lets you set the hotness threshold for function grouping and function ordering. |
OFF |
/Qprof-src-dir |
Determines whether directory information of the source file under compilation is considered when looking up profile data records. |
/Qprof-src-dir |
/Qprof-src-root |
Lets you use relative directory paths when looking up profile data and specifies a directory as the base. |
OFF |
/Qprof-src-root-cwd |
Lets you use relative directory paths when looking up profile data and specifies the current working directory as the base. |
OFF |
/Qtcollect-filter |
Lets you enable or disable the instrumentation of specified functions. |
OFF |
/Quse-msasm-symbols |
Tells the compiler to use a dollar sign ("$") when producing symbol names. |
OFF |
/Qvc9 |
Specifies compatibility with Microsoft* Visual Studio 2008. |
varies |
/Qvec |
Enables or disables vectorization and transformations enabled for vectorization. |
/Qvec |
/Qvec-threshold |
Sets a threshold for the vectorization of loops. |
/Qvec-threshold100 |
/QxHost |
Can generate instructions for the highest instruction set available on the compilation host processor. |
OFF |
/QxAVX |
Optimizes for Intel processors that support Intel® Advanced Vector Extensions (Intel® AVX). |
OFF |
/QxSSE2 |
Can generate Intel® SSE2 and SSE instructions for Intel processors, and it can optimize for Intel® Pentium® 4 processors, Intel® Pentium® M processors, and Intel® Xeon® processors with Intel® SSE2. |
ON |
/QxSSE3 |
Can generate Intel® SSE3, SSE2, and SSE instructions for Intel processors, and it can optimize for processors based on Intel® Core™ microarchitecture and Intel NetBurst® microarchitecture. |
OFF |
/QxSSE3_ATOM |
Optimizes for the Intel® Atom™ processor and Intel® Centrino® Atom™ Processor Technology. |
OFF |
/QxSSSE3 |
Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for the Intel® Core™2 Duo processor family. |
OFF |
/QxSSE4.1 |
Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. |
OFF |
/QxSSE4.2 |
Can generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for the Intel® Core™ processor family. |
OFF |
Linux* OS and Mac OS* X Options |
Description |
Default |
---|---|---|
-assume [no]ieee_fpe_flags |
Determines whether the floating-point exception and status flags are saved on routine entry and restored on routine exit. |
OFF |
-assume [no]old_logical_ldio |
Determines whether NAMELIST and list-directed input accept logical values for numeric IO-list items. |
ON |
-assume [no]old_maxminloc |
Determines the results of the intrinsics MAXLOC and MINLOC when given an empty array as an argument. |
ON |
-axSSE2 |
Can generate Intel® SSE2 and SSE instructions for Intel processors, and it can optimize for Intel® Pentium® 4 processors, Intel® Pentium® M processors, and Intel® Xeon® processors with Intel® SSE2. |
OFF |
-axSSE3 |
Can generate Intel® SSE3, SSE2, and SSE instructions for Intel processors, and it can optimize for processors based on Intel® Core microarchitecture and Intel NetBurst® microarchitecture. On Mac OS* X systems, this option is only available on IA-32 architecture. |
OFF |
-axSSSE3 |
Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for the Intel® Core™2 Duo processor family. On Mac OS* X systems, this option is only available on Intel® 64 architecture. |
OFF |
-axSSE4.1 |
Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. |
OFF |
-axSSE4.2 |
Can generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for the Intel® Core™ processor family. |
OFF |
-diag-enable sc-parallel |
Enables analysis of parallelization in source code (parallel lint diagnostics). |
OFF |
-diag-error-limit n |
Specifies the maximum number of errors allowed before compilation stops. |
n=30 |
-diag-once id[,id,...] |
Tells the compiler to issue one or more diagnostic messages only once. |
OFF |
-falign-stack |
Tells the compiler the stack alignment to use on entry to routines. |
-falign-stack=default |
-fast-transcendentals |
Enables the compiler to replace calls to transcendental functions with faster but less precise implementation. |
OFF |
-finline |
Tells the compiler to inline functions declared with cDEC$ ATTRIBUTES FORCEINLINE. |
-fno-inline |
-fma |
Enables the combining of floating-point multiplies and add/subtract operations. |
ON |
-fp-relaxed |
Enables use of faster but slightly less accurate code sequences for math functions. |
OFF |
-fpe-all=n |
Allows some control over floating-point exception handling for each routine in a program at run-time. |
-fpe-all=3 |
-fpie |
Tells the compiler to generate position-independent code to link into executables. |
OFF |
-fstack-protector |
Determines whether the compiler generates code that detects some buffer overruns. Same as option -fstack-security-check. |
-fno-stack-protector |
-fstack-security-check
|
Determines whether the compiler generates code that detects some buffer overruns. |
-fno-stack-security-check |
-m32, -m64 |
Tells the compiler to generate code for a specific architecture. |
OFF |
-mia32 |
Generates code that will run on any Pentium or later processor. |
OFF |
-minstruction=[no]movbe |
Determines whether MOVBE instructions are generated for Intel processors. |
OFF |
-mkl |
Tells the compiler to link to certain parts of the Intel® Math Kernel Library. |
OFF |
-mssse3 |
Generates code for Intel® Supplemental Streaming SIMD Extensions 3 (Intel® SSSE3). |
Linux systems: OFF Mac OS X systems using Intel® 64 architecture: ON |
-msse4.1 |
Generates code for Intel® Streaming SIMD Extensions 4 Vectorizing Compiler and Media Accelerators. |
OFF |
-openmp-link library |
Controls whether the compiler links to static or dynamic OpenMP run-time libraries. |
-openmp-link dynamic |
-openmp-threadprivate=type
|
Lets you specify an OpenMP* threadprivate implementation. |
-openmp-threadprivate=legacy |
-opt-block-factor=n |
Lets you specify a loop blocking factor. |
OFF |
-opt-jump-tables=keyword |
Enables or disables generation of jump tables for switch statements. |
-opt-jump-tables=default |
-opt-loadpair |
Enables loadpair optimization. |
-no-opt-loadpair |
-opt-mod-versioning |
Enables versioning of modulo operations for certain types of operands. |
-no-opt-mod-versioning |
-opt-prefetch-initial-values |
Enables or disables prefetches that are issued before a loop is entered. |
-opt-prefetch-initial-values |
-opt-prefetch-issue-excl-hint |
Determines whether the compiler issues prefetches for stores with exclusive hint. |
-no-opt-prefetch-issue-excl-hint |
-opt-prefetch-next-iteration
|
Enables or disables prefetches for a memory access in the next iteration of a loop. |
-opt-prefetch-next-iteration |
-opt-subscript-in-range
|
Determines whether the compiler assumes no overflows in the intermediate computation of subscript expressions in loops. |
-no-opt-subscript-in-range |
-par-affinity=[modifier,...]type[,permute][,offset]
|
Specifies thread affinity. |
OFF |
-par-num-threads=n |
Specifies the number of threads to use in a parallel region. |
OFF |
-pie |
Produces a position-independent executable on processors that support it. |
OFF |
-prof-data-order |
Enables or disables data ordering if profiling information is enabled. |
-no-prof-data-order |
-prof-func-groups |
Enables or disables function grouping if profiling information is enabled. |
-no-prof-func-groups |
-prof-func-order |
Enables or disables function ordering if profiling information is enabled. |
-no-prof-func-order |
-prof-hotness-threshold |
Lets you set the hotness threshold for function grouping and function ordering. |
OFF |
-prof-src-root |
Lets you use relative directory paths when looking up profile data and specifies a directory as the base. |
OFF |
-prof-src-root-cwd |
Lets you use relative directory paths when looking up profile data and specifies the current working directory as the base. |
OFF |
-staticlib |
Invokes the libtool command to generate static libraries. |
OFF |
-tcollect-filter
|
Lets you enable or disable the instrumentation of specified functions. |
OFF |
-vec |
Enables or disables vectorization and transformations enabled for vectorization. |
-vec |
-vec-threshold |
Sets a threshold for the vectorization of loops. |
-vec-threshold100 |
-xHost |
Can generate instructions for the highest instruction set available on the compilation host processor. |
OFF |
-xAVX |
Optimizes for Intel processors that support Intel® Advanced Vector Extensions (Intel® AVX). |
OFF |
-xSSE2 |
Can generate Intel® SSE2 and SSE instructions for Intel processors, and it can optimize for Intel® Pentium® 4 processors, Intel® Pentium® M processors, and Intel® Xeon® processors with Intel® SSE2. |
ON |
-xSSE3 |
Can generate Intel® SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for processors based on Intel® Core™ microarchitecture and Intel NetBurst® microarchitecture. On Mac OS* X systems, this option is only available on IA-32 architecture. |
Linux systems:OFF Mac OS X systems using IA-32 architecture: ON |
-xSSE3_ATOM |
Optimizes for the Intel® Atom™ processor and Intel® Centrino® Atom™ Processor Technology. |
OFF |
-xSSSE3 |
Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for the Intel® Core™2 Duo processor family. On Mac OS* X systems, this option is only available on Intel® 64 architecture. |
Linux systems:OFF Mac OS X systems using Intel® 64 architecture: ON |
-xSSE4.1 |
Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. |
OFF |
-xSSE4.2 |
Can generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for the Intel® Core™ processor family. |
OFF |