Power MSR Register
For your convenience, TotalView interprets the bit settings of the Power MSR register. You can edit the value of the MSR and set it to any of the bit settings outlined in the following table.
| Value |
Bit Setting |
Meaning |
| 0x00040000 |
POW |
Power management enable |
| 0x00020000 |
TGPR |
Temporary GPR mapping |
| 0x00010000 |
ILE |
Exception little-endian mode |
| 0x00008000 |
EE |
External interrupt enable |
| 0x00004000 |
PR |
Privilege level |
| 0x00002000 |
FP |
Floating-point available |
| 0x00001000 |
ME |
Machine check enable |
| 0x00000800 |
FE0 |
Floating-point exception mode 0 |
| 0x00000400 |
SE |
Single-step trace enable |
| 0x00000200 |
BE |
Branch trace enable |
| 0x00000100 |
FE1 |
Floating-point exception mode 1 |
| 0x00000040 |
IP |
Exception prefix |
| 0x00000020 |
IR |
Instruction address translation |
| 0x00000010 |
DR |
Data address translation |
| 0x00000002 |
RI |
Recoverable exception |
| 0x00000001 |
LE |
Little-endian mode enable |
